138 search results - page 4 / 28 » Instruction Scheduling and Executable Editing |
DSD
2002
IEEE
13 years 10 months ago
2002
IEEE
Modern microprocessors schedule instructions dynamically in order to exploit instruction-level parallelism. It is necessary to increase instruction window size for improving instr...
NIPS
1997
13 years 7 months ago
1997
Program execution speed on modern computers is sensitive, by a factor of two or more, to the order in which instructions are presented to the processor. To realize potential execu...
ISVLSI
2008
IEEE
14 years 9 hour ago
2008
IEEE
Intelligent mobile information devices require lowpower and high-performance processors. In order to reduce energy consumption with maintaining computing performance, we proposed ...
ISLPED
2005
ACM
13 years 11 months ago
2005
ACM
The instruction scheduling logic used in modern superscalar microprocessors often relies on associative searching of the issue queue entries to dynamically wakeup instructions for...
EMSOFT
2003
Springer
13 years 10 months ago
2003
Springer
We introduce the paradigm of schedule-carrying code (SCC). A hard real-time program can be executed on a given platform only if there exists a feasible schedule for the real-time t...