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» Instruction Set Emulation for Rapid Prototyping of SoCs
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RSP
1999
IEEE
122views Control Systems» more  RSP 1999»
13 years 9 months ago
Incremental Compilation for Logic Emulation
Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic...
Russell Tessier
RSP
2003
IEEE
103views Control Systems» more  RSP 2003»
13 years 10 months ago
An Instruction Throughput Model of Superscalar Processors
With advances in semiconductor technology, processors are becoming larger and more complex. Future processor designers will face an enormous design space, and must evaluate more a...
Tarek M. Taha, D. Scott Wills
CCS
2003
ACM
13 years 10 months ago
Countering code-injection attacks with instruction-set randomization
We describe a new, general approach for safeguarding systems against any type of code-injection attack. We apply Kerckhoff’s principle, by creating process-specific randomized ...
Gaurav S. Kc, Angelos D. Keromytis, Vassilis Preve...
CGO
2006
IEEE
13 years 11 months ago
BIRD: Binary Interpretation using Runtime Disassembly
The majority of security vulnerabilities published in the literature are due to software bugs. Many researchers have developed program transformation and analysis techniques to au...
Susanta Nanda, Wei Li, Lap-Chung Lam, Tzi-cker Chi...
VLSID
1999
IEEE
139views VLSI» more  VLSID 1999»
13 years 9 months ago
Processor Modeling for Hardware Software Codesign
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
V. Rajesh, Rajat Moona