20 search results - page 2 / 4 » Instruction combining for coalescing memory accesses using g... |
PARA
2004
Springer
13 years 10 months ago
2004
Springer
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
FMICS
2010
Springer
13 years 5 months ago
2010
Springer
Bitwise instructions, loops and indirect data access pose difficult challenges to the verification of microcontroller programs. In particular, it is necessary to show that an indir...
PPOPP
2009
ACM
14 years 5 months ago
2009
ACM
This paper introduces a new way to provide strong atomicity in an implementation of transactional memory. Strong atomicity lets us offer clear semantics to programs, even if they ...
IEEECIT
2010
IEEE
13 years 3 months ago
2010
IEEE
—Error concealment restores the visual integrity of image content that has been damaged due to a bad network transmission. Best neighborhood matching (BNM) is an effective image ...
MICRO
2010
IEEE
13 years 3 months ago
2010
IEEE
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...