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» Instruction level power model of microcontrollers
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EH
2004
IEEE
117views Hardware» more  EH 2004»
13 years 10 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
RSP
2000
IEEE
105views Control Systems» more  RSP 2000»
13 years 10 months ago
Processor Models for Retargetable Tools
This paper describes a methodology for developing processor specific tools such as assemblers, disassemblers, processor simulators, compilers etc., using processor models in a ge...
Rajat Moona
SIGMETRICS
2003
ACM
129views Hardware» more  SIGMETRICS 2003»
13 years 11 months ago
Run-time modeling and estimation of operating system power consumption
The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system. The Operating System ...
Tao Li, Lizy Kurian John
ASPDAC
2000
ACM
102views Hardware» more  ASPDAC 2000»
13 years 10 months ago
A hybrid approach for core-based system-level power modeling
Reducing power consumption has become a key goal for systemon-a-chip (SOC) designs. Fast and accurate power estimation is needed early in the design process, since power reduction...
Tony Givargis, Frank Vahid, Jörg Henkel
VLSID
1999
IEEE
139views VLSI» more  VLSID 1999»
13 years 10 months ago
Processor Modeling for Hardware Software Codesign
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
V. Rajesh, Rajat Moona