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ASAP
2009
IEEE
143views Hardware» more  ASAP 2009»
14 years 2 months ago
Scalar Processing Overhead on SIMD-Only Architectures
—The Cell processor consists of a general-purpose core and eight cores with a complete SIMD instruction set. Although originally designed for multimedia and gaming, it is current...
Arnaldo Azevedo Filho, Ben H. H. Juurlink
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
13 years 9 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
INFOCOM
2009
IEEE
13 years 12 months ago
Nuclei: GPU-Accelerated Many-Core Network Coding
—While it is a well known result that network coding achieves optimal flow rates in multicast sessions, its potential for practical use has remained to be a question, due to its...
Hassan Shojania, Baochun Li, Xin Wang
FSE
2005
Springer
112views Cryptology» more  FSE 2005»
13 years 10 months ago
How to Maximize Software Performance of Symmetric Primitives on Pentium III and 4 Processors
Abstract. This paper discusses the state-of-the-art software optimization methodology for symmetric cryptographic primitives on Pentium III and 4 processors. We aim at maximizing s...
Mitsuru Matsui, Sayaka Fukuda
TVLSI
2002
102views more  TVLSI 2002»
13 years 4 months ago
Low-power data forwarding for VLIW embedded architectures
In this paper, we propose a low-power approach to the design of embedded very long instruction word (VLIW) processor architectures based on the forwarding (or bypassing) hardware, ...
Mariagiovanna Sami, Donatella Sciuto, Cristina Sil...