36 search results - page 1 / 8 » Integrating TPNs and Performance Bound Techniques in ITPN-Pe... |
QEST
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—ITPN-PerfBound is a graphical tool for the modeling and performance bound analysis of Interval Time Petri Nets (ITPN), that has been developed within the DrawNET modelin...
STACS
2001
Springer
13 years 9 months ago
2001
Springer
Abstract. Ordered binary decision diagrams (OBDDs) nowadays belong to the most common representation types for Boolean functions. Although they allow important operations such as s...
INTEGRATION
2008
13 years 4 months ago
2008
Physical synthesis is a relatively young field in Electronic Design Automation. Many published optimizations for physical synthesis end up hurting the quality of the final design,...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
Linear Pseudo-Boolean Optimization (PBO) is a widely used modeling framework in Electronic Design Automation (EDA). Due to significant advances in Boolean Satisfiability (SAT), ...
ISVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...