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NOCS
2007
IEEE
14 years 15 days ago
Transaction-Based Communication-Centric Debug
Abstract— The behaviour of systems on chip (SOC) is complex because they contain multiple processors that interact through concurrent interconnects, such as networks on chip (NOC...
Kees Goossens, Bart Vermeulen, Remco van Steeden, ...
DATE
2005
IEEE
152views Hardware» more  DATE 2005»
13 years 12 months ago
Design of Fault-Tolerant and Dynamically-Reconfigurable Microfluidic Biochips
Technology Roadmap for Semiconductors (ITRS) clearly identifies the integration of electrochemical and electrobiological techniques as one of the system-level design challenges tha...
Fei Su, Krishnendu Chakrabarty
BIOCOMP
2008
13 years 7 months ago
Reverse Engineering Module Networks by PSO-RNN Hybrid Modeling
Background: Inferring a gene regulatory network (GRN) from high throughput biological data is often an under-determined problem and is a challenging task due to the following reas...
Yuji Zhang, Jianhua Xuan, Benildo de los Reyes, Ro...
VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
13 years 10 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo
SPRINGSIM
2007
13 years 7 months ago
An architecture for wireless simulation in NS-2 applied to impulse-radio ultra-wide band networks
We present an architecture for implementing a wireless physical layer in a packet-based network simulator. We integrate this architecture in the popular ns-2 network simulator and...
Ruben Merz, Jean-Yves Le Boudec, Jörg Widmer