15 search results - page 3 / 3 » Interblock memory for turbo coding |
TVLSI
2002
13 years 4 months ago
2002
Abstract--The use of "turbo codes" has been proposed for several applications, including the development of wireless systems, where highly reliable transmission is requir...
TVLSI
2008
13 years 4 months ago
2008
To satisfy the advanced forward-error-correction (FEC) standards, in which the Convolutional code and Turbo code may co-exit, a prototype design of a unified Convolutional/Turbo de...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
ICPR
2000
IEEE
13 years 9 months ago
2000
IEEE
We present an algorithm for segmentation of traffic scenes that distinguishes moving objects from cast shadows. Three image features at each pixel site are considered: brightness,...
SC
2009
ACM
13 years 11 months ago
2009
ACM
In this paper, we present an early performance evaluation of a 624-core cluster based on the Intel® Xeon® Processor 5560 (code named “Nehalem-EP”, and referred to as Xeon 55...