25 search results - page 2 / 5 » Interconnect capacitance extraction for system LCD circuits |
ICCAD
2000
IEEE
13 years 9 months ago
2000
IEEE
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
IPPS
2002
IEEE
13 years 10 months ago
2002
IEEE
Accurate estimation of signal delay is critical to the design and verification of VLSI circuits. At very high frequencies, signal delay in circuits with small feature sizes is do...
TCAD
1998
13 years 5 months ago
1998
— Integrated circuits have evolved to a stage where interconnections significantly limit their performance and functional complexity. We introduce a set of tools to perform high...
TVLSI
2002
13 years 5 months ago
2002
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
—1 In this paper we present a stochastic model order reduction technique for interconnect extraction in the presence of process variabilities, i.e. variation-aware extraction. It...