24 search results - page 3 / 5 » Interface timing verification with delay correlation using c... |
DATE
2000
IEEE
13 years 10 months ago
2000
IEEE
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
ICCAD
2003
IEEE
13 years 11 months ago
2003
IEEE
The impact of power supply integrity on a design has become a critical issue, not only for functional verification, but also for performance verification. Traditional analysis has...
SPIN
2000
Springer
13 years 9 months ago
2000
Springer
The Temporal Rover is a specification based verification tool for applications written in C, C++, Java, Verilog and VHDL. The tool combines formal specification, using Linear-Time ...
DFG
2004
Springer
13 years 10 months ago
2004
Springer
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
AGP
1999
IEEE
13 years 10 months ago
1999
IEEE
Disunification is the problem of deciding satisfiability of a system of equations and disequations with respect to a given equational theory. In this paper we study the disunifica...