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ISQED
2007
IEEE
151views Hardware» more  ISQED 2007»
14 years 2 days ago
Wavelet-Based Passivity Preserving Model Order Reduction for Wideband Interconnect Characterization
Model order reduction plays a key role in determining VLSI system performance and the optimization of interconnects. In this paper, we develop an accurate and provably passive met...
Mehboob Alam, Arthur Nieuwoudt, Yehia Massoud
ISQED
2007
IEEE
123views Hardware» more  ISQED 2007»
14 years 2 days ago
General Block Structure-Preserving Reduced Order Modeling of Linear Dynamic Circuits
In this paper, we propose a generalized block structure-preserving reduced order interconnect macromodeling method (BSPRIM). Our approach extends structure-preserving model order ...
Ning Mi, Boyuan Yan, Sheldon X.-D. Tan, Jeffrey Fa...
ISCAS
2006
IEEE
99views Hardware» more  ISCAS 2006»
13 years 11 months ago
MIMO interconnects order reductions by using the global Arnoldi algorithm
— We propose the global Arnoldi algorithm for MIMO RLCG interconnect model order reductions. This algorithm is an extension of the standard Arnoldi algorithm for systems with mul...
Ming-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng
DATE
2008
IEEE
204views Hardware» more  DATE 2008»
14 years 8 days ago
Deep Submicron Interconnect Timing Model with Quadratic Random Variable Analysis
Shrinking feature sizes and process variations are of increasing concern in modern technology. It is urgent that we develop statistical interconnect timing models which are harmon...
Jun-Kuei Zeng, Chung-Ping Chen
ICCAD
2005
IEEE
101views Hardware» more  ICCAD 2005»
14 years 2 months ago
Parameterized interconnect order reduction with explicit-and-implicit multi-parameter moment matching for inter/intra-die variat
In this paper we propose a novel parameterized interconnect order reduction algorithm, CORE, to efficiently capture both inter-die and intra-die variations. CORE applies a two-ste...
Xin Li, Peng Li, Lawrence T. Pileggi