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» Intrabody Buses for Data and Power
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ISWC
1997
IEEE
13 years 8 months ago
Intrabody Buses for Data and Power
While wearable computers are empowering fashion accessories, they bring with them a tangle of wares which connect their parts. As these subsystems begin to decouple and operate on...
Rehmi Post, Matthew Reynolds, Matthew Gray, Joseph...
MICRO
2002
IEEE
105views Hardware» more  MICRO 2002»
13 years 9 months ago
Power protocol: reducing power dissipation on off-chip data buses
K. Basu, Alok N. Choudhary, Jayaprakash Pisharath,...
ISLPED
1995
ACM
100views Hardware» more  ISLPED 1995»
13 years 8 months ago
Simultaneous scheduling and binding for power minimization during microarchitecture synthesis
ABSTRACT { Sub-micron technologies and the increasing size and complexity of integrated components have aggravated the e ect of long interconnects and buses, compared to that of ga...
Aurobindo Dasgupta, Ramesh Karri
CASES
2003
ACM
13 years 10 months ago
Power efficient encoding techniques for off-chip data buses
Reducing the power consumption of computing devices has gained a lot of attention recently. Many research works have focused on reducing power consumption in the off-chip buses as...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
DATE
2002
IEEE
154views Hardware» more  DATE 2002»
13 years 9 months ago
Low Power Error Resilient Encoding for On-Chip Data Buses
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...
Davide Bertozzi, Luca Benini, Giovanni De Micheli