3 search results - page 1 / 1 » Inverter minimization in multi-level logic networks |
ICCAD
1993
IEEE
13 years 9 months ago
1993
IEEE
In this paper, we look at the problem of inverter minimization in multi-level logic networks. The network is specified in terms of a set of base functions and the inversion opera...
DAC
1996
ACM
13 years 9 months ago
1996
ACM
Technology mapping requires the unmapped logic network to be represented in terms of base functions, usually two-input NORs and inverters. Technology decomposition is the step tha...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
This paper presents a technique for preprocessing combinational logic before technology mapping. The technique is based on the representation of combinational logic using And-Inve...