17 search results - page 1 / 4 » Is Reuse Distance Applicable to Data Locality Analysis on Ch... |
CC
2010
Springer
13 years 12 months ago
2010
Springer
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
Due to shared cache contentions and interconnect delays, data prefetching is more critical in alleviating penalties from increasing memory latencies and demands on Chip-Multiproce...
EMSOFT
2005
Springer
13 years 10 months ago
2005
Springer
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
PPPJ
2009
ACM
13 years 9 months ago
2009
ACM
Reuse distance analysis has been proved promising in evaluating and predicting data locality for programs written in Fortran or C/C++. But its effect has not been examined for ap...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...