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CAL
2002
13 years 5 months ago
Migration in Single Chip Multiprocessors
Global communication costs in future single-chip multiprocessors will increase linearly with distance. In this paper, we revisit the issues of locality and load balance in order to...
K. A. Shaw, William J. Dally
HIPEAC
2010
Springer
14 years 2 months ago
Combining Locality Analysis with Online Proactive Job Co-scheduling in Chip Multiprocessors
Abstract. The shared-cache contention on Chip Multiprocessors causes performance degradation to applications and hurts system fairness. Many previously proposed solutions schedule ...
Yunlian Jiang, Kai Tian, Xipeng Shen
SEUS
2009
IEEE
14 years 3 days ago
Towards Time-Predictable Data Caches for Chip-Multiprocessors
Future embedded systems are expected to use chip-multiprocessors to provide the execution power for increasingly demanding applications. Multiprocessors increase the pressure on th...
Martin Schoeberl, Wolfgang Puffitsch, Benedikt Hub...
CODES
2006
IEEE
13 years 11 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
13 years 10 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...