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» Joint exploration of architectural and physical design space...
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ASPDAC
2012
ACM
265views Hardware» more  ASPDAC 2012»
12 years 1 months ago
GLOW: A global router for low-power thermal-reliable interconnect synthesis using photonic wavelength multiplexing
In this paper, we examine the integration potential and explore the design space of low power thermal reliable on-chip interconnect synthesis featuring nanophotonics Wavelength Di...
Duo Ding, Bei Yu, David Z. Pan
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
13 years 11 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
14 years 6 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty