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» Kestrel: Design of an 8-bit SIMD Parallel Processor
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ARVLSI
1997
IEEE
138views VLSI» more  ARVLSI 1997»
13 years 8 months ago
Kestrel: Design of an 8-bit SIMD Parallel Processor
David M. Dahle, Jeffrey D. Hirschberg, Kevin Karpl...
ASAP
1996
IEEE
96views Hardware» more  ASAP 1996»
13 years 9 months ago
Kestrel: A Programmable Array for Sequence Analysis
Kestrel is a programmable linear array processor designed for sequence analysis. Among other features, Kestrel includes an 8-bit word, a single-cycle add-and-minimize instruction, ...
Jeffrey D. Hirschberg, Richard Hughey, Kevin Karpl...
ISCAS
2006
IEEE
107views Hardware» more  ISCAS 2006»
13 years 11 months ago
A versatile computation module for adaptable multimedia processors
—This paper describes a low cost, low power, versatile computation module that can be used as a coarse-grain building block in multimedia processors. The module, which has a data...
Yunan Xiang, R. Pettibon, Martin Margala
CASES
2010
ACM
13 years 2 months ago
Mighty-morphing power-SIMD
In modern wireless devices, two broad classes of compute-intensive applications are common: those with high amounts of data-level parallelism, such as signal processing used in wi...
Ganesh S. Dasika, Mark Woh, Sangwon Seo, Nathan Cl...
ISCAS
2007
IEEE
133views Hardware» more  ISCAS 2007»
13 years 11 months ago
Design of a Massively Parallel Vision Processor based on Multi-SIMD Architecture
— Increasing demands for robust image recognition systems require vision processors not only with enormous computational capacities but also with sufficient flexibility to hand...
Kota Yamaguchi, Yoshihiro Watanabe, Takashi Komuro...