22 search results - page 3 / 5 » Kiwi: Synthesis of FPGA Circuits from Parallel Programs |
ICS
2009
Tsinghua U.
14 years 2 days ago
2009
Tsinghua U.
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
ICVS
2001
Springer
13 years 9 months ago
2001
Springer
Abstract. At the first ICVS, we presented SA-C (“sassy”), a singleassignment variant of the C programming language designed to exploit both coarse-grain and fine-grain parallel...
TCAD
2010
13 years 1 days ago
2010
The growing complexity of systems and their implementation into silicon encourages designers to look for model designs at higher levels of abstraction and then incrementally build ...
ECOOP
2008
Springer
13 years 7 months ago
2008
Springer
Abstract. The paradigm shift in processor design from monolithic processors to multicore has renewed interest in programming models that facilitate parallelism. While multicores ar...
FCCM
2011
IEEE
12 years 9 months ago
2011
IEEE
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...