Sciweavers

601 search results - page 120 / 121
» Lattice-based memory allocation
Sort
View
JACM
2000
77views more  JACM 2000»
13 years 5 months ago
The fault span of crash failures
A crashing network protocol is an asynchronous protocol whose memory does not survive crashes. We show that a crashing network protocol that works over unreliable links can be driv...
George Varghese, Mahesh Jayaram
SIGPLAN
2002
13 years 5 months ago
Write barrier removal by static analysis
We present a new analysis for removing unnecessary write barriers in programs that use generational garbage collection. To our knowledge, this is the first static program analysis...
Karen Zee, Martin C. Rinard
INFOCOM
2010
IEEE
13 years 3 months ago
Distributed Coordination with Deaf Neighbors: Efficient Medium Access for 60 GHz Mesh Networks
Multi-gigabit outdoor mesh networks operating in the unlicensed 60 GHz "millimeter (mm) wave" band, offer the possibility of a quickly deployable broadband extension of t...
Sumit Singh, Raghuraman Mudumbai, Upamanyu Madhow
ISCA
2011
IEEE
258views Hardware» more  ISCA 2011»
12 years 9 months ago
A case for heterogeneous on-chip interconnects for CMPs
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. ...
SIGMETRICS
2011
ACM
161views Hardware» more  SIGMETRICS 2011»
12 years 8 months ago
Modeling program resource demand using inherent program characteristics
The workloads in modern Chip-multiprocessors (CMP) are becoming increasingly diversified, creating different resource demands on hardware substrate. It is necessary to allocate h...
Jian Chen, Lizy Kurian John, Dimitris Kaseridis