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NIPS
2004
13 years 6 months ago
On-Chip Compensation of Device-Mismatch Effects in Analog VLSI Neural Networks
Device mismatch in VLSI degrades the accuracy of analog arithmetic circuits and lowers the learning performance of large-scale neural networks implemented in this technology. We s...
Miguel Figueroa, Seth Bridges, Chris Diorio
CORR
2010
Springer
116views Education» more  CORR 2010»
13 years 5 months ago
Arithmetic circuits: the chasm at depth four gets wider
In their paper on the "chasm at depth four", Agrawal and Vinay have shown that polynomials in m variables of degree O(m) which admit arithmetic circuits of size 2o(m) al...
Pascal Koiran
FOCS
2008
IEEE
13 years 11 months ago
Arithmetic Circuits: A Chasm at Depth Four
We show that proving exponential lower bounds on depth four arithmetic circuits imply exponential lower bounds for unrestricted depth arithmetic circuits. In other words, for expo...
Manindra Agrawal, V. Vinay
IEICET
2006
78views more  IEICET 2006»
13 years 5 months ago
Formal Design of Arithmetic Circuits Based on Arithmetic Description Language
Naofumi Homma, Yuki Watanabe, Takafumi Aoki, Tatsu...
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
14 years 1 months ago
Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning
This paper proposes a new formalism for layout-driven optimization of datapaths. It is based on preserving an arithmetic bit level representation of the arithmetic circuit portion...
Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Mi...