Bounded Model Checking (BMC) based on Boolean Satisfiability (SAT) procedures has recently gained popularity as an alternative to BDD-based model checking techniques for finding b...
Aarti Gupta, Malay K. Ganai, Chao Wang, Zijiang Ya...
The standard translation of a Bounded Model Checking (BMC) instance into a satisfiability problem, (a.k.a SAT), might produce misleading results in the case when the model under v...
Daniel Geist, Mark Ginzburg, Yoad Lustig, Ishai Ra...
Abstract. In this paper we study traditional and enhanced BDDbased exploration procedures capable of handling large planning problems. On the one hand, reachability analysis and mo...
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...