27 search results - page 4 / 6 » Least-square estimation of average power in digital CMOS cir... |
DAC
1999
ACM
13 years 10 months ago
1999
ACM
We present a new approach for estimation and optimization of the average stand-by power dissipation in large MOS digital circuits. To overcome the complexity of state dependence i...
ICCD
2005
IEEE
14 years 2 months ago
2005
IEEE
Consideration of pairs of transition in probabilistic simulation allows power estimation for digital circuits in which inertial delays can filter glitches [5]. However, the merit ...
ASPDAC
2004
ACM
13 years 11 months ago
2004
ACM
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...
ISLPED
1997
ACM
13 years 10 months ago
1997
ACM
In this paper we present a methodology and techniques for generating cycle-accurate macro-models for RTlevel power analysis. The proposed macro-model predicts not only...
FPGA
2004
ACM
13 years 11 months ago
2004
ACM
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...