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» Leveraging 3D Technology for Improved Reliability
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DAC
2006
ACM
14 years 6 months ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
DATE
2009
IEEE
150views Hardware» more  DATE 2009»
14 years 8 days ago
A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs
—Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencie...
Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Sou...
ICMCS
2010
IEEE
210views Multimedia» more  ICMCS 2010»
13 years 6 months ago
Confidence evaluation for robust, fast-converging disparity map refinement
To improve upon the initial disparity estimates stemming from a local correspondence method, a subsequent refinement step is commonly employed. The performance of the stereo match...
Jorn Jachalsky, Markus Schlosser, Dirk Gandolph
SIGSOFT
2003
ACM
14 years 6 months ago
Leveraging field data for impact analysis and regression testing
Software products are often released with missing functionality, errors, or incompatibilities that may result in failures, inferior performances, or user dissatisfaction. In previ...
Alessandro Orso, Taweesup Apiwattanapong, Mary Jea...
MOBISYS
2009
ACM
14 years 6 months ago
Leveraging smart phones to reduce mobility footprints
Mobility footprint refers to the size, weight, and energy demand of the hardware that must be carried by a mobile user to be effective at any time and place. The ideal of a zero m...
Stephen Smaldone, Benjamin Gilbert, Nilton Bila, L...