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LCTRTS
2001
Springer
13 years 10 months ago
Combining Global Code and Data Compaction
Computers are increasingly being incorporated in devices with a limited amount of available memory. As a result research is increasingly focusing on the automated reduction of pro...
Bjorn De Sutter, Bruno De Bus, Koenraad De Bossche...
CGO
2007
IEEE
14 years 4 days ago
Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications
Run-time compilation systems are challenged with the task of translating a program’s instruction stream while maintaining low overhead. While software managed code caches are ut...
Vijay Janapa Reddi, Dan Connors, Robert Cohn, Mich...
IPPS
2007
IEEE
14 years 2 days ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...
CODES
2006
IEEE
13 years 12 months ago
A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...
Wei Qin, Joseph D'Errico, Xinping Zhu