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» Logic Partition Orderings for Multi-FPGA Systems
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RSP
1999
IEEE
122views Control Systems» more  RSP 1999»
13 years 10 months ago
Incremental Compilation for Logic Emulation
Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic...
Russell Tessier
JSYML
2002
170views more  JSYML 2002»
13 years 5 months ago
Representability in Second-Order Propositional Poly-Modal Logic
A propositional system of modal logic is second-order if it contains quantifiers p and p, which, in the standard interpretation, are construed as ranging over sets of possible worl...
Gian Aldo Antonelli, Richmond H. Thomason
GECCO
2006
Springer
206views Optimization» more  GECCO 2006»
13 years 9 months ago
A dynamically constrained genetic algorithm for hardware-software partitioning
In this article, we describe the application of an enhanced genetic algorithm to the problem of hardware-software codesign. Starting from a source code written in a high-level lan...
Pierre-André Mudry, Guillaume Zufferey, Gia...
IPPS
2007
IEEE
14 years 8 days ago
Route Table Partitioning and Load Balancing for Parallel Searching with TCAMs
With the continuous advances in optical communications technology, the link transmission speed of Internet backbone has been increasing rapidly. This in turn demands more powerful...
Dong Lin, Yue Zhang 0006, Chengchen Hu, Bin Liu, X...
DFT
2006
IEEE
105views VLSI» more  DFT 2006»
14 years 16 hour ago
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinge...