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» Look up Table (LUT) Method for Image Halftoning
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ICCAD
2002
IEEE
160views Hardware» more  ICCAD 2002»
13 years 9 months ago
Folding of logic functions and its application to look up table compaction
The paper describes the folding method of logic functions to reduce the size of memories for keeping the functions. The folding is based on the relation of fractions of logic func...
Shinji Kimura, Takashi Horiyama, Masaki Nakanishi,...
FPGA
1998
ACM
140views FPGA» more  FPGA 1998»
13 years 9 months ago
More Wires and Fewer LUTs: A Design Methodology for FPGAs
In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is dicult to nd an optim...
Atsushi Takahara, Toshiaki Miyazaki, Takahiro Muro...
JSW
2007
126views more  JSW 2007»
13 years 4 months ago
Efficient Evaluation of Multiple-Output Boolean Functions in Embedded Software or Firmware
— The paper addresses software and firmware implementation of multiple-output Boolean functions based on cascades of Look-Up Tables (LUTs). A LUT cascade is described as a means ...
Vaclav Dvorak
ICPR
2004
IEEE
14 years 6 months ago
Boosting Nested Cascade Detector for Multi-View Face Detection
In this paper, a novel nested cascade detector for multi-view face detection is presented. This nested cascade is learned by Schapire and Singer's improved boosting algorithm...
Bo Wu, Chang Huang, Haizhou Ai, Shihong Lao
FPL
2005
Springer
107views Hardware» more  FPL 2005»
13 years 10 months ago
Programmable Numerical Function Generators: Architectures and Synthesis Method
This paper presents an architecture and a synthesis method for programmable numerical function generators of trigonometric functions, logarithm functions, square root, reciprocal,...
Tsutomu Sasao, Shinobu Nagayama, Jon T. Butler