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» Loop Parallelization in the Polytope Model
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ASAP
2005
IEEE
87views Hardware» more  ASAP 2005»
13 years 10 months ago
Expression Synthesis in Process Networks generated by LAURA
The COMPAAN/LAURA [18] tool chain maps nested loop applications written in Matlab onto reconfigurable platforms, such as FPGAs. COMPAAN rewrites the original Matlab application a...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
CASES
2009
ACM
13 years 11 months ago
Optimal loop parallelization for maximizing iteration-level parallelism
This paper solves the open problem of extracting the maximal number of iterations from a loop that can be executed in parallel on chip multiprocessors. Our algorithm solves it opt...
Duo Liu, Zili Shao, Meng Wang, Minyi Guo, Jingling...
ICPP
1996
IEEE
13 years 9 months ago
Polynomial-Time Nested Loop Fusion with Full Parallelism
Data locality and synchronization overhead are two important factors that affect the performance of applications on multiprocessors. Loop fusion is an effective way for reducing s...
Edwin Hsing-Mean Sha, Chenhua Lang, Nelson L. Pass...
ISPA
2004
Springer
13 years 10 months ago
An Inspector-Executor Algorithm for Irregular Assignment Parallelization
Abstract. A loop with irregular assignment computations contains loopcarried output data dependences that can only be detected at run-time. In this paper, a load-balanced method ba...
Manuel Arenaz, Juan Touriño, Ramon Doallo
EUROPAR
2011
Springer
12 years 5 months ago
Model-Driven Tile Size Selection for DOACROSS Loops on GPUs
DOALL loops are tiled to exploit DOALL parallelism and data locality on GPUs. In contrast, due to loop-carried dependences, DOACROSS loops must be skewed first in order to make ti...
Peng Di, Jingling Xue