83 search results - page 1 / 17 » Loop Pipelining and Optimization for Run Time Reconfiguratio... |
IPPS
2000
IEEE
13 years 9 months ago
2000
IEEE
ENTCS
2002
13 years 5 months ago
2002
The paper presents approaches to the validation of optimizing compilers. The emphasis is on aggressive and architecture-targeted optimizations which try to obtain the highest perf...
ARC
2006
Springer
13 years 9 months ago
2006
Springer
To fill the gap between increasing demand for reconfigurability and performance efficiency, CGRAs are seen to be an emerging platform. In this paper, a new architecture, QUKU, is d...
ICS
1995
Tsinghua U.
13 years 8 months ago
1995
Tsinghua U.
In this paper we give a new run–time technique for finding an optimal parallel execution schedule for a partially parallel loop, i.e., a loop whose parallelization requires syn...
FPL
2008
Springer
13 years 6 months ago
2008
Springer
Loops are an important source of optimization. In this paper, we propose an extension to our work on loop unrolling and loop shifting for reconfigurable architectures. By applying...