19 search results - page 3 / 4 » Low Complexity Design of High Speed Parallel Decision Feedba... |
IEEEPACT
2000
IEEE
13 years 10 months ago
2000
IEEE
Recent research suggests that DSM clusters can benefit from parallel coherence controllers. Parallel controllers require address partitioning and synchronization to avoid handlin...
RSP
2005
IEEE
13 years 11 months ago
2005
IEEE
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
HPCA
2005
IEEE
13 years 11 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
DAWAK
2008
Springer
13 years 7 months ago
2008
Springer
The DWS (Data Warehouse Striping) technique is a data partitioning approach especially designed for distributed data warehousing environments. In DWS the fact tables are distribute...
TIP
1998
13 years 5 months ago
1998
—We propose novel discrete cosine transform (DCT) pseudophase techniques to estimate shift/delay between two onedimensional (1-D) signals directly from their DCT coefficients by...