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FCCM
2009
IEEE
115views VLSI» more  FCCM 2009»
13 years 9 months ago
Multi-Core Architecture on FPGA for Large Dictionary String Matching
FPGA has long been considered an attractive platform for high performance implementations of string matching. However, as the size of pattern dictionaries continues to grow, such ...
Qingbo Wang, Viktor K. Prasanna
WMPI
2004
ACM
13 years 10 months ago
A low cost, multithreaded processing-in-memory system
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. ...
FCCM
2004
IEEE
175views VLSI» more  FCCM 2004»
13 years 9 months ago
A Flexible Hardware Encoder for Low-Density Parity-Check Codes
We describe a flexible hardware encoder for regular and irregular low-density parity-check (LDPC) codes. Although LDPC codes achieve achieve better performance and lower decoding ...
Dong-U Lee, Wayne Luk, Connie Wang, Christopher Jo...
VLSID
2006
IEEE
153views VLSI» more  VLSID 2006»
14 years 5 months ago
An Asynchronous Interconnect Architecture for Device Security Enhancement
We present a new style of long-distance, on-chip interconnect, based loosely on the asynchronous GasP architecture. It has a number of advantages over conventional designs, the mo...
Simon Hollis, Simon W. Moore
INFOCOM
2006
IEEE
13 years 11 months ago
A Fast Content-Based Data Distribution Infrastructure
— We present Sieve – an infrastructure for fast content-based data distribution to interested users. The ability of Sieve to filter and forward high-bandwidth data streams ste...
Samrat Ganguly, Sudeept Bhatnagar, Akhilesh Saxena...