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» Low power and low voltage CMOS digital circuit techniques
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DAC
2004
ACM
13 years 9 months ago
Enabling energy efficiency in via-patterned gate array devices
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architecture...
R. Reed Taylor, Herman Schmit
ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
14 years 2 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...
CLOUD
2010
ACM
13 years 11 months ago
Virtual machine power metering and provisioning
Virtualization is often used in cloud computing platforms for its several advantages in efficiently managing resources. However, virtualization raises certain additional challeng...
Aman Kansal, Feng Zhao, Jie Liu, Nupur Kothari, Ar...
ICES
2005
Springer
177views Hardware» more  ICES 2005»
13 years 11 months ago
Evolving Hardware by Dynamically Reconfiguring Xilinx FPGAs
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
Andres Upegui, Eduardo Sanchez
ISLPED
1995
ACM
112views Hardware» more  ISLPED 1995»
13 years 9 months ago
Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors
Analog techniques can lead to ultra-efficient computational systems when applied to the right applications. The problem of associative memory is well suited to array-based analog ...
Alan Kramer, Roberto Canegallo, Mauro Chinosi, D. ...