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» Low power implementation of high throughput FIR filters
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ISCAS
2002
IEEE
85views Hardware» more  ISCAS 2002»
13 years 9 months ago
Low power implementation of high throughput FIR filters
Tughrul Arslan, Ahmet T. Erdogan
VLSID
2005
IEEE
158views VLSI» more  VLSID 2005»
14 years 5 months ago
Algorithmic Implementation of Low-Power High Performance FIR Filtering IP Cores
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...
C. H. Wang, Ahmet T. Erdogan, Tughrul Arslan
IEICET
2008
106views more  IEICET 2008»
13 years 4 months ago
Realization of Low Power High-Speed Channel Filters with Stringent Adjacent Channel Attenuation Specifications for Wireless Comm
Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters a...
Jimson Mathew, R. Mahesh, A. Prasad Vinod, Edmund ...
CDES
2006
240views Hardware» more  CDES 2006»
13 years 6 months ago
Design of Low Power 4-Tap 8-Bit Adiabatic FIR Filter
Abstract-- Digital signal processing (DSP) is used to perform filtering, decimation and down conversion in common communications systems, like in oversampling analog to digital con...
Arun N. Chandorkar, Gurvinder Singh
ISCAS
1999
IEEE
116views Hardware» more  ISCAS 1999»
13 years 9 months ago
A coefficient segmentation algorithm for low power implementation of FIR filters
The authors present a multiplication algorithm for low power implementation of digital filters on CMOS based digital signal processing systems. The algorithm decomposes individual...
Ahmet T. Erdogan, Tughrul Arslan