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» Low-Power, High-Speed CMOS VLSI Design
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VLSID
2004
IEEE
135views VLSI» more  VLSID 2004»
14 years 6 months ago
Design of Low Voltage Low Power CMOS OP-AMPS with Rail-to-Rail Input/Output Swing
Abstract--A novel input and output biasing circuit to extend the input common mode (CM) voltage range and the output swing to rail-to-rail in a low voltage op-amp in standard CMOS ...
S. V. Gopalaiah, A. P. Shivaprasad, Sukanta K. Pan...
DSD
2004
IEEE
169views Hardware» more  DSD 2004»
13 years 9 months ago
Shift Invert Coding (SINV) for Low Power VLSI
Low power VLSI circuit design is one of the most important issues in present day technology. One of the ways of reducing power in a CMOS circuit is to reduce the number of transit...
Jayapreetha Natesan, Damu Radhakrishnan
ISLPED
2003
ACM
149views Hardware» more  ISLPED 2003»
13 years 11 months ago
Elements of low power design for integrated systems
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
Sung-Mo Kang
NIPS
2003
13 years 7 months ago
A Low-Power Analog VLSI Visual Collision Detector
We have designed and tested a single-chip analog VLSI sensor that detects imminent collisions by measuring radially expansive optic flow. The design of the chip is based on a mode...
Reid R. Harrison
VLSID
2005
IEEE
139views VLSI» more  VLSID 2005»
14 years 6 months ago
Variable Input Delay CMOS Logic for Low Power Design
Modern digital circuits consist of logic gates implemented in the complementary metal oxide semiconductor (CMOS) technology. The time taken for a logic gate output to change after...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...