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    » Low-Power Twiddle Factor Unit for FFT Computation
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    IPPS
    1996
    IEEE
    171views Distributed And Parallel Com...» more  IPPS 1996»
    A New Approach to Pipeline FFT Processor
    13 years 10 months ago
    A New Approach to Pipeline FFT Processor
    Download  ipdps.cc.gatech.edu
    A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...
    Shousheng He, Mats Torkelson
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    ISLPED
    2000
    ACM
    107views Hardware» more  ISLPED 2000»
    Low power mixed analog-digital signal processing
    13 years 10 months ago
    Low power mixed analog-digital signal processing
    Download  www.cecs.uci.edu
    The power consumption of mixed-signal systems featured by an analog front-end, a digital back-end, and with signal processing tasks that can be computed with multiplications and a...
    Mattias Duppils, Christer Svensson
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