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RTCSA
2007
IEEE
13 years 11 months ago
MB++: An Integrated Architecture for Pervasive Computing and High-Performance Computing
MB++ is a system that caters to the dynamic needs of applications in a distributed, pervasive computing environment that has a wide variety of devices that act as producers and co...
David J. Lillethun, David Hilley, Seth Horrigan, U...
MSS
1995
IEEE
148views Hardware» more  MSS 1995»
13 years 8 months ago
Client/Server data Serving for High-Performance Computing
This paper will attempt to examine the industry requirements for shared network data storage and sustained high speed (10’s to 100’s to thousands of megabytes per second) netw...
Chris Wood
IPPS
2000
IEEE
13 years 9 months ago
MAJC-5200: A High Performance Microprocessor for Multimedia Computing
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
Subramania Sudharsanan
LCN
1998
IEEE
13 years 9 months ago
High Performance Integrated Network Communications Architecture (INCA)
Current communication subsystem mechanisms within workstation and PC class computers are limiting network communications throughput to a small percentage of the present network da...
Klaus Schug, Anura P. Jayasumana, Prasanth Gopalak...