308 search results - page 62 / 62 » MCGREP - A Predictable Architecture for Embedded Real-Time S... |
GLVLSI
2005
IEEE
13 years 10 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
ASPLOS
2004
ACM
13 years 10 months ago
2004
ACM
This paper introduces a compiler-orchestrated prefetching system as a unified framework geared toward ameliorating the gap between processing speeds and memory access latencies. ...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...