36 search results - page 1 / 8 » MFAST: a single chip highly parallel image processing archit... |
ICIP
1995
IEEE
13 years 8 months ago
1995
IEEE
CAMP
2005
IEEE
13 years 10 months ago
2005
IEEE
Abstract— An image sensor in which each pixel has a processing element is called a vision chip. The vision chip can perform real-time visual processing at a high frame rate of 10...
ISNN
2005
Springer
13 years 10 months ago
2005
Springer
Abstract. Artificial Neural Networks (ANNs) and image processing requires massively parallel computation of simple operator accompanied by heavy memory access. Thus, this type of ...
IPPS
2000
IEEE
13 years 9 months ago
2000
IEEE
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
CF
2007
ACM
13 years 8 months ago
2007
ACM
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...