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» MISC: a Multiple Instruction Stream Computer
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MICRO
1992
IEEE
128views Hardware» more  MICRO 1992»
13 years 9 months ago
MISC: a Multiple Instruction Stream Computer
This paper describes a single chip Multiple Instruction Stream Computer (MISC) capable of extracting instruction level parallelism from a broad spectrum of programs. The MISC arch...
Gary S. Tyson, Matthew K. Farrens, Andrew R. Plesz...
IPPS
2003
IEEE
13 years 10 months ago
Multiple Instruction Stream Control for an Associative Model of Parallel Computation
This paper describes a system software design for multiple instruction stream control in a massively parallel associative computing environment. The purpose of providing multiple ...
Michael Scherger, Johnnie W. Baker, Jerry L. Potte...
ICPP
1993
IEEE
13 years 9 months ago
Meta-State Conversion
Abstract — In MIMD (Multiple Instruction stream, Multiple Data stream) execution, each processor has its own state. Although these states are generally considered to be independe...
Henry G. Dietz, G. Krishnamurthy
HPCA
1995
IEEE
13 years 8 months ago
Program Balance and Its Impact on High Performance RISC Architectures
Information on the behavior of programs is essential for deciding the number and nature of functional units in high performance architectures. In this paper, we present studies on...
Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee...
IPPS
2005
IEEE
13 years 10 months ago
Stream PRAM
Parallel random access memory, or PRAM, is a now venerable model of parallel computation that that still retains its usefulness for the design and analysis of parallel algorithms....
Darrell R. Ulm, Michael Scherger