2 search results - page 1 / 1 » Masking at Gate Level in the Presence of Glitches |
CHES
2005
Springer
13 years 10 months ago
2005
Springer
Abstract. It has recently been shown that logic circuits in the implementation of cryptographic algorithms, although protected by “secure” random masking schemes, leak side-cha...
CTRSA
2005
Springer
13 years 10 months ago
2005
Springer
There are many articles and patents on the masking of logic gates. However, the existing publications assume that a masked logic gate switches its output no more than once per cloc...