CHES 2005 - PDF Preprint Papers

CHES 2005 International Workshop on Cryptographic Hardware and Embedded Systems

Teaser Browsing | Click Here

Title Browsing | Click Here

Wall of Fame | Most Viewed CHES-2005 Paper

click to vote

CHES
2005
Springer

281views Cryptology» more CHES 2005»

Data Remanence in Flash Memory Devices

13 years 10 months ago

Download www.cl.cam.ac.uk

Data remanence is the residual physical representation of data that has been erased or overwritten. In non-volatile programmable devices, such as UV EPROM, EEPROM or Flash, bits ar...

Sergei P. Skorobogatov

claim paper

Read More »

Disclaimer and Copyright Notice

Sciweavers respects the rights of all copyright holders and in this regard, authors are only allowed to share a link to their preprint paper on their own website. Every contribution is associated with a desciptive image. It is the sole responsibility of the authors to ensure that their posted image is not copyright infringing. This service is compliant with IEEE copyright.

Id	Views	Title	Status

1	281	Data Remanence in Flash Memory Devices	claim
2	170	Design of Testable Random Bit Generators	claim
3	156	A Very Compact S-Box for AES	claim
4	155	Scalable Hardware for Sparse Systems of Linear Equations, with Applications to Integer Factorization	claim
5	149	Resistance of Randomized Projective Coordinates Against Power Analysis	claim
6	146	AES on FPGA from the Fastest to the Smallest	claim
7	139	Using an RSA Accelerator for Modular Inversion	claim
8	129	Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment	claim
9	123	Improved Higher-Order Side-Channel Attacks with FPGA Experiments	claim
10	117	DPA Leakage Models for CMOS Logic Circuits	claim
11	111	Security Limits for Compromising Emanations	claim
12	111	Hardware Acceleration of the Tate Pairing in Characteristic Three	claim
13	109	Security Evaluation Against Electromagnetic Analysis at Design Time	claim
14	108	Further Hidden Markov Model Cryptanalysis	claim
15	107	A New Baby-Step Giant-Step Algorithm and Some Applications to Cryptanalysis	claim
16	100	Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints	claim
17	99	Short Memory Scalar Multiplication on Koblitz Curves	claim
18	96	The "Backend Duplication" Method	claim
19	91	SHARK: A Realizable Special Hardware Sieving Device for Factoring 1024-Bit Integers	claim
20	90	Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP	claim
21	87	Templates as Master Keys	claim
22	87	Comparison of Bit and Word Level Algorithms for Evaluating Unstructured Functions over Finite Rings	claim
23	85	Secure Data Management in Trusted Computing	claim
24	83	Fast Truncated Multiplication for Cryptographic Applications	claim
25	82	Bipartite Modular Multiplication	claim
26	82	Masking at Gate Level in the Presence of Glitches	claim
27	80	Successfully Attacking Masked AES Hardware Implementations	claim

Sciweavers

Explore & Download

Productivity Tools

Document Tools

Image Tools

Sciweavers