753 search results - page 2 / 151 » Mechanisms for Mapping High-Level Parallel Performance Data |
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
CCGRID
2001
IEEE
13 years 9 months ago
2001
IEEE
TACO (Topologies and Collections) is a template library that introduces the flavour of distributed data parallel processing by means of reusable topology classes and C++ s. This p...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
IEEEPACT
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper presents the Cameron Project 1 , which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications o...
RSP
2005
IEEE
13 years 10 months ago
2005
IEEE
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...