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MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
13 years 10 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
PEPM
2009
ACM
14 years 2 months ago
Self-adjusting computation: (an overview)
Many applications need to respond to incremental modifications to data. Being incremental, such modification often require incremental modifications to the output, making it po...
Umut A. Acar
VEE
2009
ACM
146views Virtualization» more  VEE 2009»
13 years 12 months ago
Demystifying magic: high-level low-level programming
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
Daniel Frampton, Stephen M. Blackburn, Perry Cheng...
PLDI
2004
ACM
13 years 10 months ago
Jedd: a BDD-based relational extension of Java
In this paper we present Jedd, a language extension to Java that supports a convenient way of programming with Binary Decision Diagrams (BDDs). The Jedd language abstracts BDDs as...
Ondrej Lhoták, Laurie J. Hendren
VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
13 years 11 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl