68 search results - page 1 / 14 » Memory Hierarchy Management for Iterative Graph Structures |
IPPS
1998
IEEE
13 years 9 months ago
1998
IEEE
The increasing gap in processor and memory speeds has forced microprocessors to rely on deep cache hierarchies to keep the processors from starving for data. For many applications...
IPPS
1999
IEEE
13 years 9 months ago
1999
IEEE
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
ICDCN
2011
Springer
12 years 8 months ago
2011
Springer
Distributed processing of real-world graphs is challenging due to their size and the inherent irregular structure of graph computations. We present HIPG, a distributed framework th...
DAC
2002
ACM
14 years 6 months ago
2002
ACM
One of the primary challenges in embedded system design is designing the memory hierarchy and restructuring the application to take advantage of it. This task is particularly impo...
ICS
1999
Tsinghua U.
13 years 9 months ago
1999
Tsinghua U.
On modern computers, the performance of programs is often limited by memory latency rather than by processor cycle time. To reduce the impact of memory latency, the restructuring ...