276 search results - page 3 / 56 » Memory Organization for Improved Data Cache Performance in E... |
ASPLOS
2006
ACM
13 years 11 months ago
2006
ACM
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
WMPI
2004
ACM
13 years 10 months ago
2004
ACM
The size and speed of first-level caches and SRAMs of embedded processors continue to increase in response to demands for higher performance. In power-sensitive devices like PDAs a...
GLVLSI
2010
IEEE
13 years 10 months ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
CF
2006
ACM
13 years 11 months ago
2006
ACM
The discrete wavelet transform (DWT) is used in several image and video compression standards, in particular JPEG2000. A 2D DWT consists of horizontal filtering along the rows fo...
EUROPAR
2003
Springer
13 years 10 months ago
2003
Springer
As compared to a complex single processor based system, on-chip multiprocessors are less complex, more power efficient, and easier to test and validate. In this work, we focus on a...