CF 2006 - PDF Preprint Papers

CF 2006 Conference On Computing Frontiers

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CF
2006
ACM

203views Applied Computing» more CF 2006»

Intermediately executed code is the key to find refactorings that improve temporal data locality

13 years 6 months ago

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The growing speed gap between memory and processor makes an efficient use of the cache ever more important to reach high performance. One of the most important ways to improve cac...

Kristof Beyls, Erik H. D'Hollander

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Id	Views	Title	Status

1	203	Intermediately executed code is the key to find refactorings that improve temporal data locality	claim
2	183	Dynamic thread assignment on heterogeneous multiprocessor architectures	claim
3	149	Memory efficient parallel matrix multiplication operation for irregular problems	claim
4	145	Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip	claim
5	124	An efficient cache design for scalable glueless shared-memory multiprocessors	claim
6	122	The potential of the cell processor for scientific computing	claim
7	119	Performance characteristics of an adaptive mesh refinement calculation on scalar and vector platforms	claim
8	116	A nano-scale reconfigurable mesh with spin waves	claim
9	110	Morphogenesis as an amorphous computation	claim
10	103	Exploiting locality to ameliorate packet queue contention and serialization	claim
11	103	Improving the memory behavior of vertical filtering in the discrete wavelet transform	claim
12	99	Topology-aware tile mapping for clusters of SMPs	claim
13	91	Instruction folding in a hardware-translation based java virtual machine	claim
14	90	Chip multiprocessing and the cell broadband engine	claim
15	89	On the decidability of phase ordering problem in optimizing compilation	claim
16	89	A dependability perspective on emerging technologies	claim
17	88	Kilo-instruction processors, runahead and prefetching	claim
18	87	Energy-aware data prefetching for multi-speed disks	claim
19	74	Tile size selection for low-power tile-based architectures	claim
20	71	On dependability of FPGA-based evolvable hardware systems that utilize virtual reconfigurable circuits	claim
21	70	Static cache partitioning robustness analysis for embedded on-chip multi-processors	claim

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