12 search results - page 1 / 3 » Memory centric thread synchronization on platform FPGAs |
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
Concurrent programs are difficult to write, reason about, re-use, and maintain. In particular, for system-level ions that use a shared memory abstraction for thread or process syn...
MIDDLEWARE
2001
Springer
13 years 9 months ago
2001
Springer
Abstract. Existing middleware is based on control-flow centric interaction models such as remote method invocations, poorly matching the structure of applications that process con...
ICPP
2009
IEEE
13 years 3 months ago
2009
IEEE
In this paper we work on the parallelization of the inherently serial Dijkstra's algorithm on modern multicore platforms. Dijkstra's algorithm is a greedy algorithm that ...
ARC
2010
Springer
13 years 8 months ago
2010
Springer
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
ANCS
2010
ACM
13 years 3 months ago
2010
ACM
Software packet processing is becoming more important to enable differentiated and rapidly-evolving network services. With increasing numbers of programmable processor and acceler...