Sciweavers

46 search results - page 2 / 10
» Memory coherence activity prediction in commercial workloads
Sort
View
FTCS
1996
132views more  FTCS 1996»
13 years 6 months ago
An Approach towards Benchmarking of Fault-Tolerant Commercial Systems
This paper presents a benchmark for dependablesystems. The benchmark consists of two metrics, number of catastrophic incidents and performance degradation, which are obtained by a...
Timothy K. Tsai, Ravishankar K. Iyer, Doug Jewitt
ISCA
1998
IEEE
119views Hardware» more  ISCA 1998»
13 years 9 months ago
Using Prediction to Accelerate Coherence Protocols
Most large shared-memory multiprocessors use directory protocols to keep per-processor caches coherent. Some memory references in such systems, however, suffer long latencies for ...
Shubhendu S. Mukherjee, Mark D. Hill
ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
13 years 10 months ago
SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery
We develop an availability solution, called SafetyNet, that uses a unified, lightweight checkpoint/recovery mechanism to support multiple long-latency fault detection schemes. At...
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, ...
ISCA
1991
IEEE
162views Hardware» more  ISCA 1991»
13 years 8 months ago
Comparison of Hardware and Software Cache Coherence Schemes
We use mean value analysis models to compare representative hardware and software cache coherence schemes for a large-scale shared-memory system. Our goal is to identify the workl...
Sarita V. Adve, Vikram S. Adve, Mark D. Hill, Mary...
ISCA
1999
IEEE
95views Hardware» more  ISCA 1999»
13 years 9 months ago
Memory Sharing Predictor: The Key to a Speculative Coherent DSM
Recent research advocates using general message predictors to learn and predict the coherence activity in distributed shared memory (DSM). By accurately predicting a message and t...
An-Chow Lai, Babak Falsafi