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» Memory copies in multi-level memory systems
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HOTI
2008
IEEE
13 years 12 months ago
Network Processing on an SPE Core in Cell Broadband Engine
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...
Yuji Kawamura, Takeshi Yamazaki, Hiroshi Kyusojin,...
ANCS
2007
ACM
13 years 9 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
ASPLOS
2006
ACM
13 years 9 months ago
Integrated network interfaces for high-bandwidth TCP/IP
This paper proposes new network interface controller (NIC) designs that take advantage of integration with the host CPU to provide increased flexibility for operating system kerne...
Nathan L. Binkert, Ali G. Saidi, Steven K. Reinhar...
NSDI
2008
13 years 7 months ago
UsenetDHT: A Low-Overhead Design for Usenet
Usenet is a popular distributed messaging and file sharing service: servers in Usenet flood articles over an overlay network to fully replicate articles across all servers. Howeve...
Emil Sit, Robert Morris, M. Frans Kaashoek
SIGPLAN
2002
13 years 5 months ago
Write barrier removal by static analysis
We present a new analysis for removing unnecessary write barriers in programs that use generational garbage collection. To our knowledge, this is the first static program analysis...
Karen Zee, Martin C. Rinard