Evolving semiconductor and circuit technology has greatly increased the pin bandwidth available to a router chip. In the early 90s, routers were limited to 10Gb/s of pin bandwidth...
John Kim, William J. Dally, Brian Towles, Amit K. ...
This paper describes the radix-64 folded-Clos network of the Cray BlackWidow scalable vector multiprocessor. We describe the BlackWidow network which scales to 32K processors with...
Steve Scott, Dennis Abts, John Kim, William J. Dal...
High-radix switches are desirable building blocks for large computer interconnection networks, because they are more suitable to convert chip I/O bandwidth into low latency and lo...
We are proposing a micro-architecture for highperformance IEEE floating-point addition that is based on a (non-redundant)high-radix representation of the floatingpoint operands....
A scalable architecture to design high radix switch fabric is presented. It uses circuit techniques to re-use existing input and output data buses and switching logic for fabric c...
Sudhir Satpathy, Reetuparna Das, Ronald G. Dreslin...