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TECS
2008
70views more  TECS 2008»
13 years 4 months ago
Minimal placement of bank selection instructions for partitioned memory architectures
Bernhard Scholz, Bernd Burgstaller, Jingling Xue
LCTRTS
2010
Springer
13 years 11 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
CASES
2006
ACM
13 years 8 months ago
Minimizing bank selection instructions for partitioned memory architecture
Bernhard Scholz, Bernd Burgstaller, Jingling Xue
LCTRTS
2007
Springer
13 years 11 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
ASPDAC
1998
ACM
160views Hardware» more  ASPDAC 1998»
13 years 9 months ago
Synthesis of Power Efficient Systems-on-Silicon
We developed a new modular synthesis approach for design of low-power core-based data-intensive application-specific systems on silicon. The power optimization is conducted in th...
Darko Kirovski, Chunho Lee, Miodrag Potkonjak, Wil...